Our strategical axes

The institute’s work is organised along three lines of research. The following buttons will show you the assigned projects for each line.

 

Efficient Information Processing

Axis coordinator: Yann Thoma

Our skills in the field of programmable circuits (FPGA/CPLD) and interconnection technologies (high-speed interfaces and buses) lead to innovative solutions in the domain of applications requiring high-speed data processing (hardware acceleration, signal processing, cryptography, etc.).
 
Our realizations rely on a solid experience of digital systems development and verification methodologies (VHDL, SystemVerilog, EDA tools, Matalab Simulink).
 
  • Computing accelerator
  • Hardware implementation tailored to dedicated algorithms (Cryptography, signal processing, etc.)
  • High-speed data communication
  • Co-design and data flow optimization
  • Software for hardware design

Under development


DNoC

Sep 30, 2015, 13:42 PM
Deterministic Network on Chip (DNoC) Based FPGA Design Environment for Xilinx Ultrascale Devices
Page:
3dd1664f-169f-6184-b062-ff0000b5cb90
Select a choice:
Terminated
StartDate:
Jan 1, 2014, 13:25 PM
EndDate:
Dec 31, 2016, 13:25 PM

This project aims to develop the Network on Chip (NoC) based FPGA design environment intended to implement the next generation of IOxOS Technologies COTS solutions based on Xilinx UltraScale FPGAs. This innovative concept is developed to guarantee a high-performance data flow within the FPGA, to support PCI Express GEN3, and to provide a high Quality of Service (QoS) to fulfill the real-time application requirements of Physics, Energy, Transport and Mil/Aero industries

axes:
  • DNOC
  • Hardware-oriented Efficient Information Processing
domaines-d-application:
Tags:
  • Highlight

Completed projects


DNoC

Sep 30, 2015, 13:42 PM
Deterministic Network on Chip (DNoC) Based FPGA Design Environment for Xilinx Ultrascale Devices
Page:
3dd1664f-169f-6184-b062-ff0000b5cb90
Select a choice:
Terminated
StartDate:
Jan 1, 2014, 13:25 PM
EndDate:
Dec 31, 2016, 13:25 PM

This project aims to develop the Network on Chip (NoC) based FPGA design environment intended to implement the next generation of IOxOS Technologies COTS solutions based on Xilinx UltraScale FPGAs. This innovative concept is developed to guarantee a high-performance data flow within the FPGA, to support PCI Express GEN3, and to provide a high Quality of Service (QoS) to fulfill the real-time application requirements of Physics, Energy, Transport and Mil/Aero industries

axes:
  • DNOC
  • Hardware-oriented Efficient Information Processing
domaines-d-application:
Tags:
  • Highlight