Our strategical axes

The institute’s work is organised along three lines of research. The following buttons will show you the assigned projects for each line.

Efficient Information Processing

Heterogeneous Device Support

Integrated Design of Embedded Systems

Efficient Information Processing

Axis coordinator: Yann Thoma

Our skills in the field of programmable circuits (FPGA/CPLD) and interconnection technologies (high-speed interfaces and buses) lead to innovative solutions in the domain of applications requiring high-speed data processing (hardware acceleration, signal processing, cryptography, etc.).

Our realizations rely on a solid experience of digital systems development and verification methodologies (VHDL, SystemVerilog, EDA tools, Matalab Simulink).

Computing accelerator
Hardware implementation tailored to dedicated algorithms (Cryptography, signal processing, etc.)
High-speed data communication
Co-design and data flow optimization
Software for hardware design

Under development

CMF

Nov 2, 2017, 12:22 PM

Cache Memory on FPGA for external DDR with Multiple Agents

Page:

872e684f-169f-6184-b062-ff0000b5cb90

Select a choice:

Terminated

StartDate:

Nov 1, 2016, 12:20 PM

EndDate:

Dec 31, 2016, 12:20 PM

The CMF project goal was to develop a cache memory on FPGA in order to improve the performances of systems requiring access to an external memory (DDR). The design has been realized based on standard cache principles as well as with the ability to arbiter between multiple access interfaces. Therefore, more than one module can access the same external memory (that will be shared).

axes:

Hardware-oriented Efficient Information Processing

domaines-d-application:

Tags:

FPGA

Completed projects

CMF