Our strategical axes

The institute’s work is organised along three lines of research. The following buttons will show you the assigned projects for each line.


Efficient Information Processing

Axis coordinator: Yann Thoma

Our skills in the field of programmable circuits (FPGA/CPLD) and interconnection technologies (high-speed interfaces and buses) lead to innovative solutions in the domain of applications requiring high-speed data processing (hardware acceleration, signal processing, cryptography, etc.).
Our realizations rely on a solid experience of digital systems development and verification methodologies (VHDL, SystemVerilog, EDA tools, Matalab Simulink).
  • Computing accelerator
  • Hardware implementation tailored to dedicated algorithms (Cryptography, signal processing, etc.)
  • High-speed data communication
  • Co-design and data flow optimization
  • Software for hardware design

Under development

Completed projects

  • Math2Mat
    Traduction automatique de code Matlab en HDL synthétisable

  • DEFi10G
    High-speed 10Gbits/s serial links

  • FPGA2
    Heterogeneous HPC systems framework

    Conception de l'Architecture d'un Banc de mesure CO-design

    Scalable hardware platform

  • NextGenUSB3
    Next-Gen USB3.x Protocol Test & Analysis System

  • QCrypt
    Secure High-Speed Communication based on Quantum Key Distribution

  • ezPCI
    Conception, développement et validation d'une IP VHDL de l'interface PCI. Développement des drivers pour Windows et Linux. Développement d'une carte PCI avec une FPGA Actel.

    Technology for interfacing optical measurement systems

  • PoSeNoGap
    Portable Scalable Concurrency for Genomic Data Processing

  • Romeo
    Real-Time Functional Cardiac Embedded Diagnostic System version 2

  • SOSoC
    System-on-Chip Optimization on embedded computing cores


  • XFV
    eXtremely Fast Vision

  • Morpheus
    Morpheus Guitar Sound Morphing System

  • DNoC
    Deterministic Network on Chip (DNoC) Based FPGA Design Environment for Xilinx Ultrascale Devices

  • TFA
    Transparent Live Code Offloading on FPGA

  • CMF
    Cache Memory on FPGA for external DDR with Multiple Agents

    Power-Efficient Hardware Acceleration of Genomic Algorithms

  • SpikeOnChip
    Analyse on-line et on-chip d'activité neuronale