TASYMO

Technology for interfacing optical measurement systems
Responsable
AUBERSON Olivier
Période
January 2014 - February 2015
Axes
Hardware-oriented Efficient Information Processing

The objective of this project was to create a new reconfigurable and scalable architecture for the interpolation of an incremental signal, that can process more than 15 Gb/s of data. The main target market is the dimensional metrology, with possible applications in other industries.

This project has studied the possibilities offered by the latest generation of FPGA, but also the study of solutions with little material resources and low cost such as DSP-based microcontrollers.